IBIS Macromodel Task Group

Meeting date: 05 October 2010

Members (asterisk for those attending):
  Adge Hawes, IBM
  Ambrish Varma, Cadence Design Systems
  Anders Ekholm, Ericsson
* Arpad Muranyi, Mentor Graphics Corp.
  Barry Katz, SiSoft
* Bob Ross, Teraspeed Consulting Group
  Brad Brim, Sigrity
  Brad Griffin, Cadence Design Systems
  Chris Herrick, Ansoft
  Chris McGrath, Synopsys
  Danil Kirsanov, Ansoft
  David Banas, Xilinx
  Deepak Ramaswany, Ansoft
  Donald Telian, consultant
  Doug White, Cisco Systems
  Eckhard Lenski, Nokia-Siemens Networks
  Eckhard Miersch, Sigrity
* Eric Sweetman, Vitesse Semiconductor
  Essaid Bensoudane, ST Microelectronics
* Fangyi Rao, Agilent
  Ganesh Narayanaswamy, ST Micro
  Gang Kang, Sigrity
  Hemant Shah, Cadence Design Systems
  Ian Dodd, consultant
  Jerry Chuang, Xilinx
  Joe Abler, IBM
* John Angulo, Mentor Graphics
  John Shields, Mentor Graphics
* Ken Willis, Sigrity
  Kellee Crisafulli, Celsionix
  Kumar Keshavan, Sigrity
  Lance Wang, Cadence Design Systems
  Luis Boluna, Cisco Systems
* Michael Mirmak, Intel Corp.
* Mike LaBonte, Cisco Systems
  Mike Steinberger, SiSoft
  Mustansir Fanaswalla, Xilinx
  Patrick O'Halloran, Tiburon Design Automation
  Paul Fernando, NCSU
  Pavani Jella, TI
  Radek Biernacki, Agilent (EESof)
  Randy Wolff, Micron Technology
  Ray Komow, Cadence Design Systems
  Richard Mellitz, Intel
  Richard Ward, Texas Instruments
  Samuel Mertens, Ansoft
  Sam Chitwood, Sigrity
  Sanjeev Gupta, Agilent
  Scott McMorrow, Teraspeed Consulting Group
  Shangli Wu, Cadence Design Systems
  Sid Singh, Extreme Networks
  Stephen Scearce, Cisco Systems
  Steve Kaufer, Mentor Graphics
  Steve Pytel, Ansoft
  Syed Huq, Cisco Systems
  Syed Sadeghi, ST Micro
  Ted Mido, Synopsys
  Terry Jernberg, Cadence Design Systems
* Todd Westerhoff, SiSoft
  Vladimir Dmitriev-Zdorov, Mentor Graphics
  Vikas Gupta, Xilinx
  Vuk Borich, Agilent
* Walter Katz, SiSoft
  Wenyi Jin, LSI Logic
  Zhen Mu, Mentor Graphics

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Opens:

- Eric Sweetman introduced himself as an application engineer for Vitesse,
  working with models of high speed devices.

--------------------------
Call for patent disclosure:

- none

-------------
Review of ARs:

- Arpad:  Write parameter passing syntax proposal (BIRD draft)

          for  -AMS models in IBIS that is consistent with the
          parameter passing syntax of the AMI models

- TBD:    Propose a parameter passing syntax for the SPICE
          - [External ...] also?
          - TBD

- Arpad:  Review the documentation (annotation) in the macro libraries.
          - Deferred until a demand arises or we have nothing else to do

-------------
New Discussion:

Arpad showed a Flow BIRD revision sent just today:
- Arpad has added a note after Step 6 on page 10.
- Bob: Maybe it should be indented like other notes.
- Fangyi: It depends on whether Rx does optimization.
- Arpad: Tx Init is not returning a modified response.
- Fangyi: OK
- Walter: I will have to look at this more closely.
- Arpad has removed "(See Step 5)" on page 9.
- Arpad: Where it says steps 4 through 8 can be repeated, step 8 is not needed
- Mike: No one will be thrown off by keeping step 8 in the loop
- Walter: Comments on the Step 6 note on page 10
  - The output of step 5 includes no equalization
- Ken: Step 3 has the output of Rx Init
- Walter: OK, but how does this get rid of deconvolution
- Arpad: No deconvolution needed if you don't have a dual model
- Walter: OK
- Ken Willis motioned to vote to submit this BIRD to the open forum
- Bob seconded
- Roll call votes:
  Y Cadence (by email to Arpad)
  Y Teraspeed Consulting Group
  Y Agilent
  Y Mentor Graphics
  Y Sigrity
  Y Intel Corp.
  Y Cisco Systems
  Y SiSoft
- The vote passed

Walter: Can we discuss Opal BIRD 119?
- Arpad: We will put it on the agenda for the next meeting

Arpad showed the IBIS-AMI Typographical Corrections BIRD:
- Some curly brackets have been restored to show optional items
- A comment about deprecation of Format has been added
- Format still appears in examples even though deprecated
- Explanation for what the curly brackets means has been added
- Change "must have two distinct sections" to "may have"
- "data format" and "Data Format" have inconsistent capitalization
- Arpad: There is a question about typical and defaults:
  - We may want to discuss that by email
- Todd: It's OK to have Typ treated as Default
- Arpad: Is Default allowed in that case?
- Todd: It's allowed but not required
  - If Typ and Default are both present Default wins
- Arpad: Value and Default are mutually exclusive
- Walter: Default is really only useful for List
- Todd: Models almost always have the Typ value as default
  - In many cases the user has no control over the parameter
  - Default only has meaning for controllable parameters
  - Default should not be required
- Arpad: If we disallow Value with Default what else is it not allowed with?
- Walter: It needs to be a legal value
  - That's the only rule
  - It should be optional but allowed for everything
- Bob: We need a simple rule
  - Walter's proposal sounds good
  - We messed this up in the original spec
  - Default should always be optional
  - We have to fix the first four Reserved parameters
- We will continue this discussion by email
- Bob: Gaussian has a natural default at the mean
- Walter: The Gaussian mean is just the center
- Walter showed a list email about task list rows 21-25
- Arpad: We need to go through the leaf structure BNF
- Walter: Table was defined to put in a PDF for Tx Jitter and Rx Clock PDF
  - The table has 3 columns
  - Labels are optional
  - This has Labels: Row_No, Time, Probability
  - We need to say what the legal labels are for jitter
- Fangyi: What does the Row_No do?
- Walter: It could be thrown away
- Bob: Why is Row_No not 1, 2, 3, ... ?
- Walter: The BNF requires a parameter name for each entry
- Arpad: This syntax is not consistent with the BNF above
- Bob: None of this was defined in the spec
  - It was an example only
  - We have a clean BNF for passing to the DLL
  - The .ami has other things that are not passed
  - Tables could be restricted to not be passed to the DLL
    - They could be output only
  - Table could be deprecated back to List

Next meeting: 12 October 2010 12:00pm PT

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IBIS Interconnect SPICE Wish List:

1) Simulator directives